The invention relates to a data processor and particularly, it is to be preferably applied to an access protection for the resources assigned to a memory space in a processor.
In a data processor with a processor mounted thereon, various resources such as memory and function module are assigned to the memory space in the processor, and an address is specified in order to gain access to the resources, to read and write data or execute a program. In the case of multitasking, generally, a memory space is divided into a plurality of regions, and in every divided region, which access to permit or prohibit is defined according to each task, hence to protect the memory space.
In US Patent Application Publication No. 2005/0027960, there is disclosed a Translation Look-aside Buffer (TLB) mounted on a processor executing a plurality of software partitions. A plurality of software partitions are regarded as a plurality of operating systems (OS: Operating System) and a plurality of independent modules of one software. Generally, the TLB is included in a memory management unit (MMU: Memory Management Unit), and formed by an associative memory of performing conversion between logical address and physical address. In the above publication, a field for holding a logical partition identifier (LPID: Logical Partition Identification) is added to the entry of the TLB, in addition to the virtual address tag, and only when the LPID specified by an access subject such as a processor at access time agrees with the held LPID, in addition to the agreement of the access virtual address, the access is permitted as a TLB hit. In the execution of the software partitions, the own LPID is added to gain access to the memory space; therefore, each region formed in the memory space is protected from any access with the different LPID from the own assigned LPID.